This invention relates to a phase-locked loop.
A phase-locked loop is a circuit that generates an output signal having a predetermined frequency and/or phase relationship with a reference signal. A typical phase-locked loop is shown in FIG. 1. The phase-locked loop comprises an oscillator 101 for generating a signal of fixed frequency and a phase/frequency detector (PFD) 102 for comparing the fixed frequency signal (the reference signal) with a feedback signal generated by a feedback loop 106. The PFD is connected to a charge pump 103. The PFD outputs a signal to the charge pump that is representative of the phase and/or frequency difference between the feedback signal and the reference signal. The charge pump injects a current into a loop filter 104 in dependence on the signal it receives from the PFD. Typically, this current injection will take the form of either an ‘up’ or ‘down’ current generated by current sources 108 and 109 respectively, so that current flows either into or out of the loop filter. In other words, the PFD and charge pump act together to output either positive or negative charge “pulses” in dependence on whether the reference signal phase leads or lags the feedback signal. The loop filter filters these charge pulses to generate a control signal for a signal generator 105.
The signal generator is typically a voltage-controlled oscillator (VCO) controlled by tuning the voltage at its control inputs. The loop filter is typically arranged to integrate the current pulses it receives from the charge pump to generate the tuning voltage necessary for controlling the VCO. If the feedback signal lags the reference signal, it is necessary to speed up the VCO. Conversely, if the feedback signal leads the reference signal, it is necessary to slow down the VCO. The frequency of the signal output by the phase-locked loop can be changed by varying the frequency of the reference signal. Often, the reference signal is generated by a very stable oscillator whose frequency cannot be varied. Therefore, it can be beneficial to include a divider in the feedback loop so that the output frequency of the phase-locked loop can be varied without having to change the frequency of the reference signal. In FIG. 1, this feedback divider is shown at 107. If the divide ratio is a constant N, then the loop forces the output signal to be exactly N times the reference signal frequency. The divide ratio N can be changed in integer steps to change the frequency of the signal generator.